Capacitor, semiconductor device having the same, and method of manufacturing the semiconductor device

ABSTRACT

A semiconductor device with a stack type capacitor having a lower electrode formed of an aluminum-doped metal, and a manufacturing method thereof are provided. The semiconductor device includes: a semiconductor substrate having a gate structure and an active region; an interlayer dielectric film formed on the active region; a lower electrode formed of a metal containing aluminum on the interlayer dielectric film; a dielectric layer formed on the lower electrode; an upper electrode formed on the dielectric layer; and a plug formed in the interlayer dielectric film to electrically connect the active region with the lower electrode. The method includes: forming a gate structure and an active region on a semiconductor substrate; forming an interlayer dielectric film on the resultant semiconductor substrate; forming a plug in the interlayer dielectric film to electrically connect with the active region; forming a mold oxidation layer on the plug and the interlayer dielectric film; patterning the mold oxidation layer with a predetermined pattern and forming a lower electrode of material containing aluminum on the plug; and sequentially forming a dielectric layer and an upper electrode on the lower electrode.

BACKGROUND OF THE INVENTION

This application claims the priority of Korean Patent Application No.2003-75218, filed on Oct. 27, 2003, in the Korean Intellectual PropertyOffice, the disclosure of which is incorporated herein in its entiretyby reference.

1. Field of the Invention

The present invention relates to a method of manufacturing asemiconductor device, and more particularly, to a semiconductor devicewith a stack type capacitor having a lower electrode formed of analuminum-doped metal, and a method of manufacturing the semiconductordevice.

2. Description of the Related Art

As the level of integration of a semiconductor device becomes higher, anoccupation area of a capacitor is reduced in a memory cell. Theresultant reduction of cell capacitance causes hindrance in increasingthe level of integration of a Dynamic Random Access Memory (DRAM).

To solve the above drawback caused by the reduction of the cellcapacitance, a capacitor area should be secured. For this, a study hasbeen vigorously progressed to increase capacitance by providing a lowerelectrode having a cylindrical or semispherical shape to increase aspatial area, or applying a dielectric film of a high dielectricconstant to a capacitor.

Since the dielectric film uses material, which has the high dielectricconstant and uses reaction gas containing oxygen, to increase thecapacitance, a very serious drawback of oxidation occurs when thecapacitor is formed.

FIG. 1 is a sectional view illustrating a conventional semiconductordevice with a capacitor structure using a high dielectric film.

As shown in FIG. 1, the conventional semiconductor device 10 includes asemiconductor substrate 12; a source and drain region 14 formed at apredetermined distance in the semiconductor substrate 12; a gatestructure electrically connected to the source and drain region 14; aninterlayer dielectric film 19 for performing interlayer insulation; alower electrode 22 sequentially formed on the interlayer dielectric film19; a dielectric layer 24 having a high dielectric constant; and anupper electrode 26. Also, a conductive plug 18 passes through theinterlayer dielectric film 19 to connect the lower electrode 22 with thesource and drain region 14. A TiN layer 20 is formed as a diffusionprevention film on the conductive plug 18.

The lower electrode 22 is generally formed of TiN. However, due toreaction gas O₃ that is used to deposit the dielectric layer 24 with thehigh dielectric constant, TiN of the lower electrode 22 that underliesthe dielectric layer 24 is easily oxidized to cause internal stress.Accordingly, the conventional semiconductor device has a drawback inthat a gate stack is collapsed and the dielectric layer 24 with the highdielectric constant is not formed.

FIG. 2 is a photograph illustrating a configuration in which the TiOlayer is formed on the TiN layer due to the influence of O₃ and a H-koxide that are used when the capacitor structure is manufactured.

As shown in FIG. 2, the TiN layer is oxidized to form the TiO layerthereon due to the influence of O₃ and the H-k oxide that are used whenthe dielectric layer formed of LaO_(x) with the high dielectric constantis formed on the lower electrode formed of TiN. This phenomenon occurseven in a HfO₂-based H-k process as well as a LaO_(x)-based H-k process,and causes the capacitor stack to be collapsed.

SUMMARY OF THE INVENTION

The present invention provides a stack type capacitor in which a lowerelectrode is formed of TiAlN with oxidation resistance, which isobtained using a negativity of Al-ligand to react with a metal precursorand using NH₃, to be prevented from being oxidized even when asubsequential process is performed using a reaction gas containingoxygen.

The present invention also provides a stack type capacitor in which adiffusion prevention film underlying a lower electrode is formed ofTiAlN with oxidation resistance to prevent the lower electrode frombeing oxidized even when a subsequential process is performed using areaction gas containing oxygen.

The present invention also provides a method of manufacturing a stacktype capacitor in which oxidation can be prevented even when amanufacture process is performed using oxygen as reaction gas.

The present invention also provides a semiconductor device having astack type capacitor in which oxidation can be prevented even when amanufacture process is performed using oxygen as reaction gas.

The present invention also provides a method of manufacturing asemiconductor device having a stack type capacitor in which oxidationcan be prevented even when a manufacture process is performed usingoxygen as reaction gas.

According to an aspect of the present invention, there is provided acapacitor including: a lower electrode formed of a metal containingaluminum; a dielectric layer formed using a reaction gas containingoxygen on the lower electrode; and an upper electrode formed on thedielectric layer.

According to another aspect of the present invention, there is provideda semiconductor device having a capacitor, the semiconductor deviceincluding: a semiconductor substrate having a gate structure and anactive region; an interlayer dielectric film formed on the activeregion; a lower electrode formed of a metal containing aluminum on theinterlayer dielectric film; a dielectric layer formed on the lowerelectrode; an upper electrode formed on the dielectric layer; and a plugformed in the interlayer dielectric film to electrically connect theactive region with the lower electrode.

According to a further aspect of the present invention, there isprovided a method of manufacturing a semiconductor device having acapacitor, the method including: forming a gate structure and an activeregion on a semiconductor substrate; forming an interlayer dielectricfilm on the resultant semiconductor substrate; forming a plug in theinterlayer dielectric film to electrically connect with the activeregion; forming a mold oxidation layer on the plug and the interlayerdielectric film; patterning the mold oxidation layer with apredetermined pattern and forming a lower electrode of materialcontaining aluminum on the plug; and sequentially forming a dielectriclayer and an upper electrode on the lower electrode.

According to a still further aspect of the present invention, there isprovided a method of manufacturing a semiconductor device having acapacitor, the method including: forming a gate structure and a sourceand drain region on a semiconductor substrate; forming an interlayerdielectric film on the resultant semiconductor substrate; forming a plugin the interlayer dielectric film to electrically connect with thesource and drain region; forming a diffusion prevention film of materialcontaining aluminum on the plug; forming a mold oxidation layer on thediffusion prevention film and the interlayer dielectric film; patterningthe mold oxidation layer with a predetermined pattern and then forming alower electrode of material containing aluminum on the plug; andsequentially forming a dielectric layer and an upper electrode on thelower electrode.

The lower electrode may be formed of a material containing Titaniumaluminum nitride (TiAlN) or tantalum aluminum nitride (TaAlN).

Further, if the lower electrode is formed of TiAlN or TaAlN, the upperelectrode is formed of a material containing ruthenium (Ru) or titanium(Ti), or the dielectric layer is formed of a material containing LaO_(x)or HfO_(x).

Furthermore, if the diffusion prevention film is formed of a materialcontaining TiAlN or TaAlN, oxidation drawback is not caused even whenthe lower electrode is formed of a material containing Ru or Ti, or thedielectric layer comprises LaO_(x) or HfO_(x), or the upper electrode isformed of a material containing Ru or TiN.

Additionally, the lower electrode and the diffusion prevention film areformed by flowing a mixture gas of a material, such as TiA₄, and analuminum ligand, such as trimethyl aluminum (Al[(CH₃)₃]), over thesemiconductor substrate with the plug to form a TiAl layer while HA andCO₂ emit out in gas form; and flowing NH₃ over the TiAl layer to form aTiAlN layer while HA emits out in gas form.

According to the present invention, the lower electrode can be preventedfrom being oxidized when the dielecric film is formed, therebypreventing harmful effects caused by oxidation of the lower electrode.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other features and advantages of the present inventionwill become more apparent by describing in detail exemplary embodimentsthereof with reference to the attached drawings in which:

FIG. 1 is a sectional view illustrating a conventional semiconductordevice with a capacitor structure;

FIG. 2 is a photograph illustrating a configuration in which a TiO layeris formed on a TiN layer due to the influence of O₃ and a H-k oxide thatare used when a conventional capacitor structure is manufactured;

FIG. 3 is a sectional view illustrating a semiconductor device with acapacitor structure according to a preferred embodiment of the presentinvention;

FIGS. 4A through 4F are sectional views illustrating a method ofmanufacturing a semiconductor device with a capacitor structureaccording to a preferred embodiment of the present invention;

FIG. 5 is a sectional view illustrating a semiconductor device with acapacitor structure according to another embodiment of the presentinvention;

FIGS. 6A through 6I are sectional views illustrating a method ofmanufacturing a semiconductor device with a capacitor structureaccording to another embodiment of the present invention; and

FIG. 7 is a Transmission Electron Microscopy (TEM) photographillustrating an interfacial structure of TiAlN/LaO that constructs alower electrode of a capacitor structure according to a preferredembodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

The present invention will now be described more fully with reference tothe accompanying drawings, in which exemplary embodiments of theinvention are shown. The invention may, however, be embodied in manydifferent forms and should not be construed as being limited to theembodiments set forth herein; rather, these embodiments are provided sothat this disclosure will be thorough and complete, and will fullyconvey the concept of the invention to those skilled in the art. In thedrawings, the thicknesses of layers and regions are exaggerated forclarity. It will also be understood that when a layer is referred to asbeing “on” another layer or substrate, it can be directly on the otherlayer or substrate, or intervening layers may also be present.

FIG. 3 is a sectional view illustrating a semiconductor device with acapacitor structure according to a preferred embodiment of the presentinvention.

Referring to FIG. 3, the semiconductor device 100 with a capacitorstructure according to a preferred embodiment of the present inventionincludes a semiconductor substrate 102; a source and drain region 104formed at a predetermined distance in a semiconductor substrate 102; agate structure 106 electrically connected to the source and drain region104; an interlayer dielectric (ILD) film 108 for performing interlayerinsulation; a lower electrode 122 formed on the interlayer dielectricfilm 108; and a dielectric layer 124 and an upper electrode 126 with ahigh dielectric constant.

Further, a conductive plug 110 passes through the interlayer dielectricfilm 108 to electrically connect the lower electrode 122 with the sourceand drain region 104.

According to a preferred embodiment of the present invention, theconductive plug 110 uses a conductive material such as silicon. However,if other materials allow the electrical conduction between the lowerelectrode 122 and the source and drain region 104 that is formed in thesemiconductor substrate 102, it does not matter that the conductive plug110 can be formed of the other materials.

FIGS. 4A through 4F are sectional views illustrating a method ofmanufacturing the semiconductor device with the capacitor structureaccording to a preferred embodiment of the present invention.

First, as shown in FIG. 4A, the semiconductor substrate 102 is providedwith the source and drain region 104 and the gate structure 106. Afterthat, the interlayer dielectric film 108, which is formed of aninsulating film such as a silicon oxide film, is formed on thesemiconductor substrate 102. The interlayer dielectric film 108 isformed to a thickness that is enough to insulate overlying layers to beformed sequentially on the semiconductor substrate 102.

Next, the interlayer dielectric film 108 is patterned usingphotolithography and etching to open the underlying source and drainregion 104. Next, the opened source and drain region 104 are filled withan electrically conductive material to complete the conductive plug 110.The conductive plug 110 may be formed of silicon.

As shown in FIG. 4B, a mold oxidation layer 116 is deposited to athickness that is enough to form a lower electrode of the capacitorusing, for example, chemical vapor deposition (CVD), on the interlayerdielectric film 108 and the conductive plug 110. After that, the moldoxidation layer 116 can be also planarized using chemical mechanicalpolishing (CMP).

As shown in FIG. 4C, the mold oxidation layer 116 is etched according toa predetermined pattern to open the conductive plug 110 such that themold oxidation layer 116 has a contact hole 118.

As shown in FIG. 4D, if a mixture gas of a material such as TiA₄ andaluminum ligand such as trimethyl aluminum (Al[CH₃]₃) flows on theconductive plug 110 and the mold oxidation layer 116, a TiAl layer isformed on the conductive plug 110 and the mold oxidation layer 116 whileHA and CO₂ emit out in gas form. Here, “A” denotes halogen such asfluorine (F), chlorine (Cl), iodine (I) or bromine (Br).

After that, if NH₃ gas flows on the TiAl layer, a TiAlN layer is formedwhile HA emits out in gas form. The above process is repeated to depositthe TiAlN layer at a desired thickness. Accordingly, the TiAlN layer isresultantly formed as a lower electrode layer 120 on the conductive plug110 and the mold oxidation layer 116. According to a preferredembodiment of the present invention, the mold oxidation layer 116 isformed of SiO₂ and a silicon oxide.

As shown in FIG. 4E, after the lower electrode layer 120 is etched-backuntil an upper surface of the mold oxidation layer 116 is exposed, themold oxidation layer 116 is removed. As a result, a lower electrode 122is obtained. Though not illustrated in the drawings, but in the removingof the mold oxidation layer 116 after formation of the conductive plug110, an etching prevention layer can be also further formed for thepurpose of preventing the etching of the interlayer dielectric film 108.

As shown in FIG. 4F, the dielectric layer 124 with the high dielectricconstant and the upper electrode .126 are sequentially formed on thelower electrode 122 and the exposed interlayer dielectric film 108 so asto complete the semiconductor device 100 with the capacitor structureaccording to a preferred embodiment of the present invention.

According to a preferred embodiment of the present invention, thedielectric layer 124 is formed of LaO_(x) or HfO_(x), but can be alsoformed using material such as BST(Ba,Sr)TiO₃ (barium strontium titaniumoxide) and ZrO_(x).

Further, according to an embodiment of the present invention, the lowerelectrode 122 is formed of TiAlN with the oxidation resistance to beprevented from being oxidized even when a subsequential process isperformed using oxygen as the reaction gas. Accordingly, it does notmatter that the upper electrode 126 employs an oxidation inductionmaterial such as TiN or ruthenium (Ru).

FIG. 5 is a sectional view illustrating the semiconductor device withthe capacitor structure according to another embodiment of the presentinvention.

Referring to FIG. 5, the semiconductor device 200 with the capacitorstructure according to another embodiment of the present inventionincludes a semiconductor substrate 202; a source and drain region 204formed at a predetermined distance in the semiconductor substrate 202; agate structure 206 electrically connected to the source and drain region204; an ILD film 208 for performing interlayer insulation; and a lowerelectrode 222, a dielectric layer 224 with a high dielectric constant,and an upper electrode 226 that are sequentially formed on the ILD film208.

Here, a conductive plug 210 passes through the interlayer dielectricfilm 208 to electrically connect the low electrode 222 with the sourceand drain region 204.

The conductive plug 210 uses a conductive material such as silicon.However, if other materials allow the electrical conduction between thelower electrode 222 and the source and drain region 204 that is formedin the semiconductor substrate 202, it does not matter that theconductive plug 210 can be formed of the other materials.

Further, a second diffusion prevention film 214 is formed of TiAlN orTaAlN between the lower electrode 222 and a first diffusion preventionfilm 213 that is formed on the conductive plug 210, so as to suppress amutual diffusion or a chemical reaction occurring between the lowerelectrode 222 and the first diffusion prevention film 213 that is formedon the conductive plug 210.

Further, a conventional TiN layer for preventing oxidation and diffusioncan be replaced with and formed of TiAlN through a process of formingthe lower electrode 222 over the conductive plug 210 according to apreferred embodiment of the present invention. Accordingly, even thoughthe lower electrode 222 is formed of a precious metal-based material,which can be easily oxidized, such as ruthenium (Ru) and iridium (Ir),the lower electrode 222 can be prevented from being oxidized in thesubsequential process.

In another aspect of the present invention, TaAlN or an aluminum-dopedmetal instead of TiAlN can be used as the lower electrodes 122 and 222and the second diffusion prevention film 214 as long as it preventsoxidation in the subsequential process.

FIGS. 6A through 6I are sectional views illustrating a method ofmanufacturing the semiconductor device with the capacitor structureaccording to another embodiment of the present invention.

First, as shown in FIG. 6A, a semiconductor substrate 202 is providedwith a source and drain region 204 and a gate structure 206. After that,an interlayer dielectric film 208, which is formed of an insulating filmsuch as a silicon oxide film, is formed on the semiconductor substrate202. At this time, the interlayer dielectric film 208 is formed at athickness that is enough to insulate the overlying layer from thesemiconductor substrate 202.

Next, the interlayer dielectric film 208 is patterned usingphotolithography and etching to open the source and drain region 204.After that, an electrically conductive material is formed on the openedsource and drain region 204 to complete the conductive plug 210. At thistime, the conductive plug 210 may be formed of silicon. And then, thefirst diffusion prevention film 213 is formed of TiN on the conductiveplug 210.

Next, as shown in FIG. 6B, an insulating film 212 is formed on theinterlayer insulating film 208 and the first diffusion prevention film213. At this time, the insulating film 212 is used to prevent theetching of the interlayer dielectric film 208 in a subsequentialremoving of the mold oxidation layer.

And then, as shown in FIG. 6C, the insulating film 212 is patterned tohave a predetermined pattern in a photolithography and etching processto expose the first diffusion prevention film 213.

After that, a second diffusion prevention film 214 is formed of TiAlN onthe exposed first diffusion prevention film 213 and the insulating film212 as in detail described in the following.

First, if a mixture gas of a material such as TiA₄ and aluminum ligandsuch as trimethyl aluminum (Al[CH₃]₃) flows on the semiconductorsubstrate 202 including the first diffusion prevention film 213, a TiAllayer is formed while HA and CO₂ emit out in gas form. Here, “A” denoteshalogen such as fluorine (F), chlorine (Cl), iodine (I) or bromine (Br).

After that, if NH₃ gas flows on the TiAl layer, a TiAlN layer iscompleted as the second diffusion prevention film 214 with HA emittingout in the form of gas. Accordingly, the second diffusion preventionfilm 214 is resultantly formed of TiAlN on the first diffusionprevention film 213.

Further, a conventional TiN layer for preventing oxidation and diffusioncan be replaced with and formed of TiAlN through a process of formingthe second diffusion prevention film 214 according to a preferredembodiment of the present invention. Accordingly, even though the lowerelectrode 222 is formed of a material, which can be easily oxidized,such as ruthenium (Ru) and TiN, the lower electrode 222 can be preventedfrom being oxidized in the subsequential process.

In another aspect of the present invention, TiAlN can be replaced withTaAlN or an aluminum-doped metal as the second diffusion prevention film214 as long as it prevents oxidation in the subsequential process.

Next, as shown in FIG. 6D, a mold oxidation layer 216 is formed on thesecond diffusion prevention film 214 and the insulating film 212 at athickness that is enough to form the lower electrode of the capacitor byusing, for example, CVD. And then, the mold oxidation layer 216 can bealso planarized using Chemical Mechanical Polishing (CMP).

As shown in FIG. 6E, the mold oxidation layer 216 is etched according toa predetermined pattern to have a contact hole 218 therein for openingthe second diffusion prevention film 214.

Next, as shown in FIG. 6F, a lower electrode layer 220 is formed ofruthenium and the like on the second diffusion prevention film 214 andthe mold oxidation layer 216 to fill the contact hole 218. That is, thelower electrode layer 220 is formed of ruthenium according to anotherembodiment of the present invention as in detail described in thefollowing.

First, a halogen-based material such as iodine is absorbed on a surfaceof the mold oxidation layer 216 with the contact hole 218. And then, thehalogen-based material reacts with a ruthenium (Ru) precursor, which isused in Atomic Layer Deposition (ALD), to induce the decomposition ofthe ruthenium precursor.

Next, the ruthenium precursor is absorbed on the iodine-absorbed surfaceof the mold oxidation layer 216 having the contact hole 218. At thistime, the absorbed iodine of the mold oxidation layer 216 reacts withthe ruthenium precursor to decompose ruthenium from ligand of theruthenium precursor. After remaining ruthenium precursor is purged,oxygen gas is absorbed on the remaining ruthenium precursor. The oxygengas reacts with the ligand of the ruthenium precursor to decomposeruthenium from the ruthenium precursor, and the decomposed rutheniumreacts with oxygen to form a ruthenium oxide, thereby forming the lowerelectrode layer 220.

The forming of the lower electrode layer 220 using ruthenium is indetail described as above, but it does not matter that the lowerelectrode layer 220 is formed of TiN, or TiAlN that is used when thesecond diffusion prevention film 214 is formed.

After that, as shown in FIG. 6G, after the lower electrode layer 220 isetched-back until an upper surface of the mold oxidation layer 216 isexposed, the mold oxidation layer 216 is removed. Resultantly, a lowerelectrode 222 is obtained as shown in FIG. 6H.

Next, as shown in FIG. 6I, the dielectric layer 224 and the upperelectrode 226 are sequentially formed on the lower electrode 222 and theexposed insulating film 212, thereby completing the semiconductor devicewith the capacitor structure.

The second diffusion prevention film 214 is formed of an oxidationresistance material for preventing oxidation such as TiAlN or TaAlN, onthe first diffusion prevention film 213 that is formed on the conductiveplug 210. Accordingly, the lower electrode or the oxidation preventionfilm can be prevented from being oxidized even when the lower electrodeand the upper electrode are formed of TiN or ruthenium in thesubsequential process using the reaction gas containing oxygen.

FIG. 7 is a Transmission Electron Microscopy (TEM) photographillustrating an interfacial structure of TiAlN layer/LaO₂ layer thatconstruct the lower electrode of the capacitor structure according tothe present invention. Here, reference numerals “A”, “B” and “C” denotethe semiconductor substrate, the TiAlN layer, and a LaO₂ layerrespectively.

As shown in FIG. 7, even though the LaO₂ layer is formed as ahigh-dielectric layer in oxygen atmosphere, the inventive capacitorstack structure is greatly improved in comparison with a conventionalcapacitor stack structure.

As described above, the present invention has an effect in that thelower electrode and the diffusion prevention film are formed of thealuminium-doped metal such that the lower electrode and the diffusionprevention film are not oxidized even in the subsequential process usingatmosphere containing oxygen.

Also, the present invention has an effect in that current leakage isimproved by using the TiAlN layer as the lower electrode to preventoxidation.

Further, the present invention has an effect in that the upper electrodecan be formed of TiN or Ru with a large work function in thesubsequential process by forming the lower electrode and/or thediffusion prevention film of the aluminium-doped metal.

While the present invention has been particularly shown and describedwith reference to exemplary embodiments thereof, it will be understoodby those of ordinary skill in the art that various changes in form anddetails may be made therein without departing from the spirit and scopeof the present invention as defined by the following claims.

1-15. (canceled)
 16. A method of manufacturing a semiconductor devicehaving a capacitor, the method comprising: forming a gate structure andan active region on a semiconductor substrate; forming an interlayerdielectric film on the resultant semiconductor substrate; forming a plugin the interlayer dielectric film to electrically connect with theactive region; forming a mold oxidation layer on the plug and theinterlayer dielectric film; patterning the mold oxidation layer with apredetermined pattern, and then forming a lower electrode of materialcontaining aluminum on the plug; and sequentially forming a dielectriclayer and an upper electrode on the lower electrode.
 17. The method ofclaim 16, wherein the lower electrode containing aluminum is formed of amaterial containing TaAlN.
 18. The method of claim 16, wherein the lowerelectrode containing aluminum is formed of a material containing TiAlN.19. The method of claim 18, wherein the forming of the lower electrodecomprises: flowing a mixture gas of material TiA₄ and aluminum ligand,trimethyl aluminum (Al[(CH₃)₃]), on the semiconductor substrate with theplug to form a TiAl layer while HA and CO₂ emit out in gas form; andflowing NH₃ over the TiAl layer to form a TiAlN layer while HA emits outin gas form, where “A” is a halogen element selected from the groupconsisting of fluorine (F), chorine (Cl), iodine (I) and bromine (Br).20. The method of claim 16, wherein the dielectric layer comprisesLaO_(x) or HfO_(x), where x is between 0 and
 3. 21. The method of claim16, wherein the plug is formed of a material containing silicon (Si).22. The method of claim 16, wherein the mold oxidation layer is SiO₂.23. A method of manufacturing a semiconductor device having a capacitor,the method comprising: forming a gate structure and a source and drainregion on a semiconductor substrate; forming an interlayer dielectricfilm on the resultant semiconductor substrate; forming a plug in theinterlayer dielectric film to electrically connect with the source anddrain region; forming a diffusion prevention film of material containingaluminum on the plug; forming a mold oxidation layer on the diffusionprevention film and the interlayer dielectric film; patterning the moldoxidation layer with a predetermined pattern and forming a lowerelectrode on the plug; and sequentially forming a dielectric layer andan upper electrode on the lower electrode.
 24. The method of claim 23,wherein the diffusion prevention film containing aluminum is formed of amaterial containing TaAlN.
 25. The method of claim 23, wherein thediffusion prevention film containing aluminum is formed of a materialcontaining TiAlN.
 26. The method of claim 25, wherein the forming of thediffusion prevention film comprises: flowing a mixture gas of materialTiA₄ and aluminum ligand, trimethyl aluminum (Al[(CH₃)₃]) on thesemiconductor substrate with the plug to form a TiAl layer while HA andCO₂ emit out in gas form; and flowing NH₃ over the TiAl layer to form aTiAlN layer while HA emits out in gas form, where “A” is a halogenelement selected from the group consisting of fluorine (F), chorine(Cl), iodine (I), and bromine (Br).
 27. The method of claim 23, whereinthe dielectric layer comprises LaO_(x) or HfO_(x) where x is between 0and
 3. 28. The method of claim 23, wherein the upper electrode is formedof a material containing Ru or TiN.
 29. The method of claim 23, whereinthe mold oxidation layer comprises SiO₂.